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M27C160
16 Mbit (2 Mb x 8 or 1 Mb x 16) UV EPROM and OTP EPROM
Features

5V 10% Supply Voltage in Read Operation Access Time: 50 ns Byte-wide or Word-wide Configurable 16 Mbit Mask ROM Replacement Low Power Consumption - Active Current: 70 mA at 8 MHz - Standby Current: 100 A Programming Voltage: 12.5V 0.25V
1
1 1 42 42
FDIP42W (F)
PDIP42 (B)
42

Programming Time: 50 s/word Electronic Signature - Manufacturer Code: 20h - Device Code: B1h ECOPACK(R) packages available
PLCC44 (K)
SDIP42 (S)
44
1
SO44 (M)
April 2006
Rev 5
1/26
www.st.com 1
Contents
M27C160
Contents
1 2 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 2.10 Read mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Two-line output control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 System considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Presto III programming algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Program Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Program Verify . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Erasure operation (applies to UV EPROM) . . . . . . . . . . . . . . . . . . . . . . . 11
3 4 5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.1 5.2 5.3 5.4 5.5 42-pin Ceramic Frit-seal DIP with window (FDIP42WB) . . . . . . . . . . . . . 19 42-pin Plastic DIP, 600 mils width (PDIP42) . . . . . . . . . . . . . . . . . . . . . . . 20 42-lead Shrink Plastic DIP, 600 mils width (SDIP42) . . . . . . . . . . . . . . . . 21 44-lead Square Plastic Leaded Chip Carrier (PLCC44) . . . . . . . . . . . . . . 22 44-lead Plastic Small Outline, 525 mils body width (SO44) . . . . . . . . . . . 23
6 7
Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2/26
M27C160
List of tables
List of tables
Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Electronic Signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Read Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Programming Mode DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Read Mode AC Characteristics (-50 and -70) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Read Mode AC Characteristics (-90, -100, -120 and -150) . . . . . . . . . . . . . . . . . . . . . . . . 16 Programming Mode AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 FDIP42WB package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PDIP42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SDIP42 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PLCC44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SO44 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3/26
List of figures
M27C160
List of figures
Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 PLCC Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 DIP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 SO Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Programming Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 AC Testing Input Output Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 AC Testing Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Word-Wide Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Byte-Wide Read Mode AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 BYTE Transition AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Programming and Verify Modes AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 FDIP42WB package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 PDIP42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SDIP42 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PLCC44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 SO44 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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M27C160
Summary description
1
Summary description
The M27C160 is a 16-Mbit EPROM offered in two ranges UV (Ultraviolet Erase) and OTP (One-Time Programmable). It is ideally suited for microprocessor systems requiring large data or program storage and is organized as either 2 Mbit words of 8 bits or 1 Mbit word of 16 bits. The pin-out is compatible with a 16-Mbit Mask ROM. The FDIP42W (window ceramic frit-seal package) has a transparent lid which enables the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written rapidly to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C160 is offered in PDIP42, SDIP42, PLCC44 and SO44 packages. In order to meet environmental requirements, ST offers the M27C160 in ECOPACK(R) packages. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. See Figure 1: Logic diagram and Table 1: Signal names for a brief overview of the signals connected to this device. Figure 1. Logic diagram
VCC
20 A0-A19 15
Q15A-1
Q0-Q14 E G BYTEVPP M27C160
VSS
AI00739B
5/26
Summary description Table 1. Signal names
Signal A0-A19 Q0-Q7 Q8-Q14 Q15A-1 E G BYTEVPP VCC VSS NC Address Inputs Data Outputs Data Outputs Data Output / Address Input Chip Enable Output Enable Byte Mode / Program Supply Supply Voltage Ground Not Connected Internally Description
M27C160
Figure 2.
PLCC Connections
A5 A6 A7 A17 A18 VSS A19 A8 A9 A10 A11
1 44 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 23 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A-1 Q7 Q14 Q6 12 M27C160 34
Q9 Q2 Q10 Q3 Q11 NC VCC Q4 Q12 Q5 Q13
AI03012
6/26
M27C160 Figure 3. DIP Connections
A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 42 41 2 40 3 39 4 5 38 6 37 7 36 8 35 9 34 10 33 M27C160 11 32 12 31 13 30 14 29 15 28 16 27 17 26 18 25 19 24 20 23 21 22
AI00740
Summary description
A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC
Figure 4.
SO Connections
NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 44 2 43 42 3 41 4 5 40 6 39 7 38 8 37 9 36 10 35 11 34 M27C160 12 33 13 32 14 31 15 30 16 29 28 17 27 18 26 19 25 20 24 21 22 23
AI01264
NC A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC
7/26
Device description
M27C160
2
Device description
Table 2 lists the operating modes of the M27C160. A single power supply is required in the read mode. All inputs are TTL compatible except for VPP and 12V on A9 for the Electronic Signature. Table 2. Operating Modes
Mode Read Word-wide Read Byte-wide Upper Read Byte-wide Lower Output Disable Program Verify Program Inhibit Standby Electronic Signature E VIL VIL VIL VIL VIL Pulse VIH VIH VIH VIL G VIL VIL VIL VIH VIH VIL VIH X VIL BYTEVPP VIH VIL VIL X VPP VPP VPP X VIH A9 X X X X X X X X VID Q15A-1 Data Out VIH VIL Hi-Z Data In Data Out Hi-Z Hi-Z Code Q8-Q14 Data Out Hi-Z Hi-Z Hi-Z Data In Data Out Hi-Z Hi-Z Codes Q7-Q0 Data Out Data Out Data Out Hi-Z Data In Data Out Hi-Z Hi-Z Codes
Note:
X = VIH or VIL, VID = 12V 0.5V.
2.1
Read mode
The M27C160 has two organisations, Word-wide and Byte-wide. The organisation is selected by the signal level on the BYTEVPP pin. When BYTEVPP is at VIH the Word-wide organisation is selected and the Q15A-1 pin is used for Q15 Data Output. When the BYTEVPP pin is at VIL the Byte-wide organisation is selected and the Q15A-1 pin is used for the Address Input A-1. When the memory is logically regarded as 16 bit wide, but read in the Byte-wide organisation, then with A-1 at VIL the lower 8 bits of the 16 bit data are selected and with A-1 at VIH the upper 8 bits of the 16 bit data are selected. The M27C160 has two control functions, both of which must be logically active in order to obtain data at the outputs. In addition the Word-wide or Byte- wide organisation must be selected. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV.
2.2
Standby mode
The M27C160 has a standby mode which reduces the active current from 50mA to 100A. The M27C160 is placed in the standby mode by applying a CMOS high signal to the E input.
8/26
M27C160
Device description When in the standby mode, the outputs are in a high impedance state, independent of the G input.
2.3
Two-line output control
Because EPROMs are usually used in larger memory arrays, this product features a 2-line control function which accommodates the use of multiple memory connection. The two line control function allows:

the lowest possible memory power dissipation, complete assurance that output bus contention will not occur.
For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.
2.4
System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the supplies to the devices. The supply current ICC has three segments of importance to the system designer: the standby current, the active current and the transient peaks that are produced by the falling and rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device outputs. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1F ceramic capacitor is used on every device between VCC and VSS. This should be a high frequency type of low inherent inductance and should be placed as close as possible to the device. In addition, a 4.7F electrolytic capacitor should be used between VCC and VSS for every eight devices. This capacitor should be mounted near the power supply connection point. The purpose of this capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.
2.5
Programming
When delivered (and after each erasure for UV EPROM), all bits of the M27C160 are in the '1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a '0' to a '1' is by die exposure to ultraviolet light (UV EPROM). The M27C160 is in the programming mode when VPP input is at 12.5V, G is at VIH and E is pulsed to VIL. The data to be programmed is applied to 16 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. VCC is specified to be 6.25V 0.25V.
2.6
Presto III programming algorithm
The Presto III Programming Algorithm allows the whole array to be programed with a guaranteed margin in a typical time of 52.5 seconds. Programming with Presto III consists of
9/26
Device description
M27C160
applying a sequence of 50s program pulses to each word until a correct verify occurs (see Figure 5). During programing and verify operation a Margin mode circuit is automatically activated to guarantee that each cell is programed with enough margin. No overprogram pulse is applied since the verify in Margin mode provides the necessary margin to each programmed cell. Figure 5. Programming Flowchart
VCC = 6.25V, VPP = 12.5V
n=0
E = 50s Pulse NO ++n = 25 YES NO VERIFY YES Last Addr NO ++ Addr
FAIL
YES CHECK ALL WORDS BYTEVPP =VIH 1st: VCC = 6V 2nd: VCC = 4.2V
AI01044B
2.7
Program Inhibit
Programming of multiple M27C160s in parallel with different data is also easily accomplished. Except for E, all like inputs including G of the parallel M27C160 may be common. A TTL low level pulse applied to a M27C160's E input and VPP at 12.5V, will program that M27C160. A high level E input inhibits the other M27C160s from being programmed.
2.8
Program Verify
A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with E at VIH and G at VIL, VPP at 12.5V and VCC at 6.25V.
2.9
Electronic Signature
The Electronic Signature (ES) mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and type. This mode is intended for use by programming equipment to automatically match the device to be programmed with its corresponding programming algorithm. The ES mode is functional in the 25C 5C
10/26
M27C160
Device description ambient temperature range that is required when programming the M27C160. To activate the ES mode, the programming equipment must force 11.5V to 12.5V on address line A9 of the M27C160, with VPP = VCC = 5V. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH. All other address lines must be held at VIL during Electronic Signature mode. Byte 0 (A0 = VIL) represents the manufacturer code and byte 1 (A0 = VIH) the device identifier code. For the STMicroelectronics M27C160, these two identifier bytes are given in Table 3 and can be read-out on outputs Q7 to Q0. Table 3. Electronic Signature
A0 VIL VIH Q7 0 1 Q6 0 0 Q5 1 1 Q4 0 1 Q3 0 0 Q2 0 0 Q1 0 0 Q0 0 1 Hex Data 20h B1h
Identifier Manufacturer's Code Device Code
Note:
Outputs Q15-Q8 are set to '0'.
2.10
Erasure operation (applies to UV EPROM)
The erasure characteristics of the M27C160 is such that erasure begins when the cells are exposed to light with wavelengths shorter than approximately 4000 A. It should be noted that sunlight and some type of fluorescent lamps have wavelengths in the 3000-4000 A range. Research shows that constant exposure to room level fluorescent lighting could erase a typical M27C160 in about 3 years, while it would take approximately 1 week to cause erasure when exposed to direct sunlight. If the M27C160 is to be exposed to these types of lighting conditions for extended periods of time, it is suggested that opaque labels be put over the M27C160 window to prevent unintentional erasure. The recommended erasure procedure for M27C160 is exposure to short wave ultraviolet light which has a wavelength of 2537 A. The integrated dose (i.e. UV intensity x exposure time) for erasure should be a minimum of 30 W-sec/cm2. The erasure time with this dosage is approximately 30 to 40 minutes using an ultraviolet lamp with 12000 W/cm2 power rating. The M27C160 should be placed within 2.5cm (1 inch) of the lamp tubes during the erasure. Some lamps have a filter on their tubes which should be removed before erasure.
11/26
Maximum ratings
M27C160
3
Maximum ratings
Table 4.
Symbol TA TBIAS TSTG VIO (3) VCC VA9
(3)
Absolute Maximum Ratings (1)
Parameter Ambient Operating Temperature (2) Temperature Under Bias Storage Temperature Input or Output Voltage (except A9) Supply Voltage A9 Voltage Program Supply Voltage Value -40 to 125 -50 to 125 -65 to 150 -2 to 7 -2 to 7 -2 to 13.5 -2 to 14 Unit C C C V V V V
VPP
1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Depends on range. 3. Minimum DC voltage on Input or Output is -0.5V with possible undershoot to -2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
12/26
M27C160
DC and AC characteristics
4
DC and AC characteristics
TA = 0 to 70 C or -40 to 85 C; VCC = 5V 5% or 5V 10%; VPP = VCC Table 5.
Symbol ILI ILO
Read Mode DC Characteristics (1)
Parameter Input Leakage Current Output Leakage Current Test Condition 0V VIN VCC 0V VOUT VCC E = VIL, G = VIL, IOUT = 0mA, f = 8MHz E = VIL, G = VIL, IOUT = 0mA, f = 5MHz Supply Current (Standby) TTL E = VIH Min. Max. 1 10 70 50 1 100 10 -0.3 2 IOL = 2.1mA IOH = -400A 2.4 0.8 VCC + 1 0.4 Unit A A mA mA mA A A V V V V
ICC
Supply Current
ICC1 ICC2 IPP VIL VIH
(2)
Supply Current (Standby) CMOS E > VCC - 0.2V Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL VPP = VCC
VOL VOH
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Maximum DC voltage on Output is VCC +0.5V.
TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.5V 0.25V Table 6.
Symbol ILI ICC IPP VIL VIH VOL VOH VID
Programming Mode DC Characteristics (1)
Parameter Input Leakage Current Supply Current Program Current Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage TTL A9 Voltage IOL = 2.1mA IOH = -2.5mA 3.5 11.5 12.5 E = VIL -0.3 2.4 Test Condition 0 VIN VCC Min. Max. 1 50 50 0.8 VCC + 0.5 0.4 Unit A mA mA V V V V V
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP.
13/26
DC and AC characteristics Table 7.
Symbol CIN COUT
M27C160
Capacitance (1)
Parameter Input Capacitance (except BYTEVPP) Input Capacitance (BYTEVPP) Output Capacitance Test Condition VIN = 0V VIN = 0V VOUT = 0V Min. Max. 10 120 12 Unit pF pF pF
1. Sampled only, not 100% tested.
TA = 25 C, f = 1 MHz Table 8. AC Measurement Conditions
Parameter High Speed Standard
Input Rise and Fall Times Input Pulse Voltages Input and Output Timing Ref. Voltages
10ns 0 to 3V 1.5V
20ns 0.4V to 2.4V 0.8V and 2V
Figure 6.
AC Testing Input Output Waveform
High Speed 3V 1.5V 0V
Standard 2.4V 2.0V 0.8V
AI01822
0.4V
Figure 7.
AC Testing Load Circuit
1.3V
1N914
3.3k DEVICE UNDER TEST CL
OUT
CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance
AI01823B
14/26
M27C160
DC and AC characteristics
TA = 0 to 70 C or -40 to 85 C; VCC = 5V 5% or 5V 10%; VPP = VCC Table 9. Read Mode AC Characteristics (1) (-50 and -70)
M27C160 Symbol Alt Parameter Test Condition -50 (2) Min. tAVQV tBHQV tELQV tGLQV tBLQZ (3) tEHQZ (3) tGHQZ (3) tAXQX tBLQX tACC Address Valid to Output Valid E = VIL, G = VIL tST tCE tOE tSTD tDF tDF tOH tOH BYTE High to Output Valid Chip Enable Low to Output Valid E = VIL, G = VIL G = VIL Max. 50 50 50 30 30 0 0 5 5 25 25 0 0 5 5 -70 (2) Min. Max. 70 70 70 35 30 25 25 ns ns ns ns ns ns ns ns ns Unit
Output Enable Low to Output E = VIL Valid BYTE Low to Output Hi-Z Chip Enable High to Output Hi-Z Output Enable High to OutputHi-Z E = VIL, G = VIL G = VIL E = VIL
Address Transition to Output E = VIL, G = VIL Transition BYTE Low to Output Transition E = VIL, G = VIL
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Speed obtained with High Speed AC measurement conditions. 3. Sampled only, not 100% tested.
15/26
DC and AC characteristics Table 10. Read Mode AC Characteristics(1) (-90, -100, -120 and -150)
M27C160 Symbol Alt Parameter Test Condition -90 (2) -100 (2)
M27C160
-120/-150 (2) Unit
Min. Max. Min. Max. Min. Max. tAVQV tBHQV tELQV tGLQV tBLQZ (3) tEHQZ (3) tGHQZ (3) tAXQX tBLQX tACC tST tCE tOE tSTD tDF tDF tOH tOH Address Valid to Output Valid BYTE High to Output Valid Chip Enable Low to Output Valid Output Enable Low to Output Valid E = VIL, G = VIL E = VIL, G = VIL G = VIL E = VIL 90 90 90 45 30 0 0 5 5 30 30 0 0 5 5 100 100 100 50 40 40 40 0 0 5 5 120 120 120 60 50 50 50 ns ns ns ns ns ns ns ns ns
BYTE Low to Output Hi- E = VIL, Z G = VIL Chip Enable High to Output Hi-Z Output Enable High to OutputHi-Z Address Transition to Output Transition BYTE Low to Output Transition G = VIL E = VIL E = VIL, G = VIL E = VIL, G = VIL
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Speed obtained with High Speed AC measurement conditions. 3. Sampled only, not 100% tested.
Figure 8.
A0-A19
Word-Wide Read Mode AC Waveforms
VALID tAVQV tAXQX VALID
E tGLQV G tELQV Q0-Q15 tGHQZ Hi-Z tEHQZ
AI00741B
Note:
BYTEVPP = VIH.
16/26
M27C160 Figure 9. Byte-Wide Read Mode AC Waveforms
DC and AC characteristics
A-1,A0-A19
VALID tAVQV tAXQX
VALID
E tGLQV G tELQV Q0-Q7 tGHQZ Hi-Z tEHQZ
AI00742B
Note:
BYTEVPP = VIL. Figure 10. BYTE Transition AC Waveforms
A0-A19 VALID
A-1 tAVQV BYTEVPP
VALID tAXQX
tBHQV Q0-Q7 tBLQX Hi-Z Q8-Q15 tBLQZ
AI00743C
DATA OUT
DATA OUT
Note:
Chip Enable (E) and Output Enable (G) = VIL.
17/26
DC and AC characteristics TA = 25 C; VCC = 6.25V 0.25V; VPP = 12.5V 0.25V Table 11.
Symbol tAVEL tQVEL tVPHAV tVCHAV tELEH tEHQX tQXGL tGLQV tGHQZ
(2)
M27C160
Programming Mode AC Characteristics(1)
Alt tAS tDS tVPS tVCS tPW tDH tOES tOE tDFP tAH Parameter Address Valid to Chip Enable Low Input Valid to Chip Enable Low VPP High to Address Valid VCC High to Address Valid Chip Enable Program Pulse Width Chip Enable High to Input Transition Input Transition to Output Enable Low Output Enable Low to Output Valid Output Enable High to Output Hi-Z Output Enable High to Address Transition 0 0 Test Condition Min 2 2 2 2 45 2 2 120 130 55 Max Unit s s s s s s s ns ns ns
tGHAX
1. VCC must be applied simultaneously with or before VPP and removed simultaneously or after VPP. 2. Sampled only, not 100% tested.
Figure 11. Programming and Verify Modes AC Waveforms
A0-A19 tAVEL Q0-Q15 DATA IN tQVEL BYTEVPP tVPHAV VCC tVCHAV E tELEH G tQXGL tGHAX tGLQV tGHQZ tEHQX DATA OUT VALID
PROGRAM
VERIFY
AI00744
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M27C160
Package mechanical data
5
5.1
Package mechanical data
42-pin Ceramic Frit-seal DIP with window (FDIP42WB)
Figure 12. FDIP42WB package outline
A2 A1 B1 B D2 D S
N
A L C eA eB
e
K
1
E1
E
K1
FDIPW-C
Table 12.
Symbol
FDIP42WB package mechanical data
millimeters Min. Typ. Max. 5.71 0.50 3.90 0.40 1.27 0.22 50.80 15.24 14.50 2.29 15.40 16.17 9.32 11.30 3.18 1.52 4 42 14.90 2.79 15.80 18.32 9.47 11.55 4.10 2.49 15 0.571 0.090 0.606 0.637 0.367 0.445 0.125 0.060 4 42 1.78 5.08 0.55 1.52 0.31 54.81 2.000 0.600 0.587 0.110 0.622 0.721 0.373 0.455 0.161 0.098 15 0.020 0.154 0.016 0.050 0.009 Min. inches Typ. Max. 0.225 0.070 0.200 0.022 0.060 0.012 2.158
A A1 A2 B B1 C D D2 E E1 e eA eB K K1 L S N
19/26
Package mechanical data
M27C160
5.2
42-pin Plastic DIP, 600 mils width (PDIP42)
Figure 13. PDIP42 package outline
A2 A1 B1 B D2 D S
N
A L eA eB C
e1
E1
1
E
PDIP
Table 13.
Symbol
PDIP42 package mechanical data
millimeters Min. Typ. Max. 5.08 0.25 3.56 0.38 1.27 0.20 52.20 50.80 15.24 13.59 2.54 14.99 15.24 3.18 0.86 0 42 17.78 3.43 1.37 10 0.600 0.125 0.034 0 42 13.84 0.535 0.100 0.590 0.700 0.135 0.054 10 4.06 0.53 1.65 0.36 52.71 0.010 0.140 0.015 0.050 0.008 2.055 2.000 0.600 0.545 0.160 0.021 0.065 0.014 2.075 Min. inches Typ. Max. 0.200
A A1 A2 B B1 C D D2 E E1 e1 eA eB L S N
20/26
M27C160
Package mechanical data
5.3
42-lead Shrink Plastic DIP, 600 mils width (SDIP42)
Figure 14. SDIP42 package outline
A2 A1 b2 b D2 D S
N
A L eA eB c
e
E1
1
E
SDIP
Table 14.
Symbol
SDIP42 package mechanical data
millimeters Min. Typ. Max. 5.08 0.51 3.05 0.38 0.89 0.23 36.58 3.81 0.46 1.02 0.25 36.83 35.60 1.78 15.24 12.70 13.72 15.24 18.54 2.54 3.30 0.64 42 3.56 0.100 0.130 0.025 42 16.00 14.48 0.600 0.500 0.540 0.600 0.730 0.140 4.57 0.56 1.14 0.38 37.08 0.020 0.120 0.015 0.035 0.009 1.440 0.150 0.018 0.040 0.010 1.450 1.402 0.070 0.630 0.570 0.180 0.022 0.045 0.015 1.460 Min. inches Typ. Max. 0.200
A A1 A2 b b2 c D D2 e E E1 eA eB L S N
21/26
Package mechanical data
M27C160
5.4
44-lead Square Plastic Leaded Chip Carrier (PLCC44)
Figure 15. PLCC44 package outline
D D1
1N
A1 c
B1
E3
E1 E
E2 B
e
D3
A2 A CP
PLCC-B
D2
Table 15.
Symbol
PLCC44 package mechanical data
millimeters Min. Typ. Max. 4.570 3.040 3.700 0.533 0.812 0.101 0.510 17.400 16.510 14.990 12.700 17.400 16.510 14.990 12.700 1.270 44 17.650 16.660 16.000 0.6850 0.6500 0.5902 0.5000 0.0500 44 17.650 16.662 16.000 0.6850 0.6500 0.5902 0.5000 0.6949 0.6559 0.6299 0.0201 0.6949 0.6560 0.6299 Min. 0.1654 0.0902 0.1437 0.0130 0.0260 inches Typ. Max. 0.1799 0.1197 0.1457 0.0210 0.0320 0.0040
A A1 A2 B B1 CP c D D1 D2 D3 E E1 E2 E3 e N
4.200 2.290 3.650 0.331 0.661
22/26
M27C160
Package mechanical data
5.5
44-lead Plastic Small Outline, 525 mils body width (SO44)
Figure 16. SO44 package outline
A2 b e D
A C CP
N
E
EH
1
A1
L
SO-d
Table 16.
Symbol
SO44 package mechanical data
millimeters Min. Typ. Max. 2.80 0.10 2.20 0.35 0.10 28.00 13.20 15.75 2.30 0.40 0.15 28.20 13.30 16.00 1.27 0.80 8 44 44 2.40 0.50 0.20 0.08 28.40 13.50 16.25 1.1024 0.5197 0.6201 1.1102 0.5236 0.6299 0.0500 0.0315 8 0.0039 0.0866 0.0138 0.0039 0.0906 0.0157 0.0059 0.0945 0.0197 0.0079 0.0030 1.1181 0.5315 0.6398 Min. inches Typ. Max. 0.1102
A A1 A2 b C CP D E EH e L N
23/26
Part numbering
M27C160
6
Part numbering
Table 17.
Example: Device Type M27 Supply Voltage C = 5V Device Function 160 = 16 Mbit (2mb x 8 or 1Mb x 16) Speed -50 (1) = 50 ns -70 (1) = 70 ns -90 = 90 ns -100 = 100 ns -120 = 120 ns -150 = 150 ns VCC Tolerance blank = 10% X = 5% Package F = FDIP42W B = PDIP42 S = SDIP42 K = PLCC44 M = SO44 Temperature Range 1 = 0 to 70 C 6 = -40 to 85 C
1. High Speed, see AC Characteristics section for further information.
Ordering Information Scheme
M27C160 -70 X M 1
For a list of available options (Speed, Package, etc...) or for further information on any aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.
24/26
M27C160
Revision history
7
Revision history
Table 18.
Date January 1999 20-Sep-00 19-Jul-01 17-Jan-02 12-Apr-2006
Document revision history
Revision 1 2 3 4 5 First Issue AN620 Reference removed SDIP42 package added 50ns speed class added, SO44 package mechanical data and drawing clarified Converted to new template. Updated ECOPACK(R) information. Removed Tape & Reel info. Changes
25/26
M27C160
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